1. Field
Aspects discussed herein relate to an electro-static discharge protection circuit.
2. Description of Related Art
In order to prevent damage caused by electro static discharge, an electro-static discharge (ESD) protection circuit is provided in a chip, e.g., in an input and output unit of an integrated circuit (IC) having a metal oxide semiconductor (MOS) structure. When a positive or negative high voltage is applied to a terminal of the chip, the ESD protection circuit includes a path which becomes conductive to release charge into a power supply line or a ground line.
The related art is disclosed in Japanese Laid-open Patent Publication No. 2005-101386, Japanese Laid-open Patent Publication No. 2002-522906, or the like.